
Usin
the Network Options Ethernet Tester
50
840 USE 115 00 Version 1.0
Receive Interrupts and Transmit Interrupts. The number of times the PCNET
controller chip has
enerated interrupts.
Transmit timeout errors. The number of times the transmitter has been on the
channel lon
er than the interval re
uired to send the maximum len
th frame of
1519 b
tes. This is also known as a babble error.
Collision errors. The number of collisions detected b
the Ethernet chip.
Missed packet errors. The number of times a received frame was dropped
because a receive descriptor was not available.
Memor
errors. The number of times an Ethernet controller chip experienced
an error accessin
shared RAM. A memor
error will cause a restart.
PcNet restart count. The number of times the Ethernet controller chip was
restarted due to fatal runtime errors, includin
memor
errors, transmit buffer
errors and transmit underflow.
Framin
error. The number of times an incomin
frame contained a non-
inte
er multiple of ei
ht bits.
Overflow errors. The number of times the receiver has lost part or all of an
incomin
frame, due to an inabilit
to store the frame in memor
before the
internal FIFO overflowed.
CRC errors. The number of times a CRC
FCS
error was detected on an
incomin
frame.
Receive buffer errors. The number of times a receive buffer was not available
while data chainin
a received frame.
Transmit buffer errors. The number of times the end packet fla
on the current
buffer was not set and the Ethernet controller did not own the next buffer. A
transmit buffer error causes a restart.
Silo Underflow. The number of times a packet was truncated due to data late
from memor
. A Silo Underflow will cause a restart.
Late Collision. The number of times a collision was detected after the slot time
of the channel had elapsed.
Lost Carrier. The number of times a carrier was lost durin
a transmission.
Transmit retries. The number of times the transmitter has failed after 16
attempts to transmit a messa
e, due to repeated collisions.
These statistics also ma
be obtained from the MSTR block. Refer to the
Ladder
Logic Block Library User Guide
for details.
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